Assembly Code

Pin Configuration

Timing Chart Pins

Select pins to display in timing chart.
Select registers to display as bus signals.

Shift & FIFO Control

State STOPPED

PC: 0
Clock: 0
X: 0x00000000
Y: 0x00000000
OSR: 0x00000000 (0)
ISR: 0x00000000 (0)

FIFOs

TX FIFO

    RX FIFO

      GPIO State (32-bit)

      Value: 0x00000000
      FF1: 0x00000000
      FF2: 0x00000000
      Click: Toggle Input Value.
      Right-Click/Shift+Click: Toggle Direction (In/Out).
      Alt+Click: Toggle INPUT_SYNC_BYPASS for this GPIO (2-cycle synchronizer).
      Output High Output Low Input Low Input High S Synchronizer engaged (hardware default; +2 cycle input latency)
      INPUT_SYNC_BYPASS:

      Timing Chart (GPIO 0-3)

      Interrupts (IRQ)

      Click to toggle IRQ flag.

      Register Update